Authors:

Andrew Lykken

Date Created:

Not specified

Course Title:

Professor:

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About Paper:

System On a Chip devices contain everything a computer needs to execute programs all in one packaged integrated circuit. Creating System on a Chip (SoC) devices involves the design process, integration, extensive testing, and finally, manufacture of the SoC. Purdue's System on a Chip Extended Technology (SoCET) team develops RISC-V based SoC devices. RISC-V chips are used to simplify the SoC creation process by using a standard instruction set which is open-source, for any team to use and develop on. Previous generations of the AFT chips have limited features and performance. The design for the latest iteration, AFTx07, includes more integrated features, enhanced peripherals, and overall better performance than previous generations. This project aims to help validate the functionality of AFTx07 using comprehensive test scripts and a field programmable gate array (FPGA) to simulate and run programs on the current design of AFTx07. In this project, a mixture of C and RISC-V assembly was used to write test cases for the chip's features and run on an Intel Cyclone IV FPGA. The code is compiled with the RISC-V standard instruction set and run with an off-chip memory module. Code execution tests will be performed and analyzed with coverage tests, compile and runtime figures, power usage, and resource usage. A validation test suite will be used for compiling results. After FPGA testing of AFTx07, final routing and die design will need to be completed prior to manufacturing the chip.

Source:

Purdue University / 2023

Topics:

No topics listed

Co-authors:

Andrew Lykken