Authors:

Lavinia Barker

Date Created:

Not specified

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Professor:

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About Paper:

Through Silicon Via (TSV) technology allows for advancements in 3D heterogeneous packaging solutions of semiconductor devices by enabling vertical innerconnection of Si dies. However, reliable TSV filling of semiconductor chips must be achieved without void or seam defects, requiring a defined and uniform current density during the electroplating process. Therefore, the ALPHA lab at Purdue University required the development of an electrode holder exposing chips to a defined area of electroplating solution, with uniform current density applied around the chip's conductive surface. Additionally, drawing on previous literature into Cu nanograin electroplating with impinging jet electrodes (IJEs), an IJE system for TSV electroplating was designed to integrate into the lab's existing set-up. The development and manufacturing of these devices allow the ALPHA lab to mitigate defects in the TSV manufacturing process and conduct further research into the effects of current density, electroplating bath stirring velocity and electrolyte additive concentrations in ensuring even, replicable and efficient Cu TSV electroplating.

Source:

Purdue University / 2023

Topics:

No topics listed

Co-authors:

Lavinia Barker