Authors:

Kameron Lee Jackson

Date Created:

Not specified

Course Title:

Professor:

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About Paper:

This research project explores the design of a hardware-accelerated Advanced Encryption Standard (AES) module for secure data processing within a system-on-chip (SoC). The work is part of the Digital Design subteam in Purdue's System-on-Chip Extension Technologies (SoCET) undergraduate research group. The goal is to implement a modular, synthesizable AES encryption unit in Chisel, a hardware construction language embedded in Scala. The design will be integrated into a larger open-source SoC using the FuseSoC build system and verified through simulation and testbench development. The research emphasizes the trade-offs between performance, area, and modularity in hardware cryptographic designs and aims to provide a flexible and reusable core for embedded security applications. This work represents a foundational step in learning real-world ASIC development flows and contributes to Purdue's efforts in undergraduate hardware research and education. Keywords: [no keywords provided]

Source:

Purdue University / 2025

Topics:

No topics listed

Co-authors:

Kameron Lee Jackson